Monthly Archives: June 2017

IR Modulation Processing Algorithm Development – Part XI

Posted 26 June 2017

In my last post on this subject, I had just decided to replace the Trinket transmit module with a second Teensy 3.5 to see if this would produce a more stable transmit waveform.  Indeed, it did seem to be more stable, as shown by the plots at the bottom of yesterday’s post.

Today I decided to see if I could further improve the situation by getting a closer match between the transmit and receive  frequencies.  To do this I modified the demodulator program to output a square wave at what it thinks is the right frequency, and compare it to the waveform being used to drive the IR LED.  If I can get these to match exactly, then there will still be a phase offset, but it will be a (mostly) constant factor.

The starting point for this effort is shown in the following short video, taken several eons (OK only 10 days) ago on June 16.



With this as the starting point, I started first by tweaking the transmit frequency.  For this test, I triggered the scope on the receiver square wave signal, and tried to stop the drift of the transmit waveform.  After a while I got pretty close, but couldn’t get it stopped.  This was more than a little bit frustrating, as I thought the Teensy much higher clock speed should provide commensurately better resolution using the Teensy 3.x-specific ‘elapsedMicros’ type.

So, back to the inet for some more research.  After an hour or so I found this post, and buried in the middle of it was a reply by PaulStoffregen  (creator of the Teensy line) that noted that

The proper way to get repeating on a 1000 us interval is this:


If you set “sinceLastRead” to zero, you could “lose” any increment it makes between the time your “if” condition runs and the time it’s written. An interrupt might occur, for example. By subtracting 1000, and increment it’s made will be preserved. Software latency can still cause jitter, but overall you’ll get the correct rate, even if interrupts delay the write to sinceLastRead.

I had been setting my elapsedMicros variable to zero, so I decided to try using Paul’s technique to see if the timing accuracy improved at all.  When I did, suddenly I was able to get the transmit and receive frequencies to match very closely, as shown in the following short video clip


After seeing this miracle of timing, I decided to run another set of ‘final value’ plots in Excel, with the following results

These plots seem a lot more consistent than before, and a lot less ‘spiky’, so maybe I’m making some progress.  However, friend and mentor John Jenkins’ comment was “still something wrong – magnitude is off” – rats! ;-).

Stay tuned,



IR Modulation Processing Algorithm Development – Part X

Posted 24 June 2017

Well, I may have spoken too soon about the perfection of my implementation of John’s ‘N-path’ band-pass filter (BPF) intended to make Wall-E2 impervious to IR interference.  After my last post on this subject, I re-ran some of the ‘Final Value’ plots for different received IR modulation amplitudes and the results were, to put it bluntly, crap 🙁 . Shown below is my original plot from yesterday, followed by the same plot for different input amplitudes

Computed final values vs complete input data cycles for sensor channel 1 (This is the original from yesterday)


So, clearly something is ‘fishy in Denmark’ here, when the ‘no-signal’ case with only high-frequency noise causes the output to increase without limit, and the ‘input grounded’ case is decidedly non-zero (although the values are much lower than in the ‘signal present’ cases).

Time to go back through the entire algorithm (again!) looking for the problem(s).  

25 June 2017

My original implementation of the algorithm was set up to handle four sensor input channels, so each step of the process required an iteration step to go through all four, something like the code snippet below:

In order to simplify the debug problem, I decided to eliminate all these iteration steps and just focus on one channel.  To do this I ‘branched’ my project into a ‘SingleChannel’ branch using GIT and TortoiseGit’s wonderful GIT user interface (thanks TortoiseGit!).  This allows me to muck about in a new sandbox without completely erasing my previous work – yay!

Anyway, I eliminated all the 4-sensor iteration steps, and went back through each step to make sure each was operating properly.  When I was ‘finished’ (I never really finish with any program – I just tolerate whatever level of bugs or imperfections it has for some time).  After this, I ran some tests for proper operation using just one channel.  For these tests, the Teensy ADC channel being used was a) grounded, b) connected to 3.3VDC, c) unterminated.  For each condition I captured the ‘Final Value’ output from the algorithm and plotted it in Excel, as shown below.

Single channel testing with grounded, unterminated, and +3.3VDC input

As can be seen from the above plot, things seem to be working now, at least for a single channel.  The ‘grounded’ and ‘3.3VDC’ cases are very nearly zero for all time, as expected, and the ‘unterminated’ case is also very low.

Next, I added a 0.5V p-p signal at ~520Hz to the sensor input, and re-ran the program.  After capturing the ‘Final Value’ data as before, I added it to the above plot, as shown below

Final Value vs Cycles for 0.5V p-p input

As can be seen in the above plot, the ‘Final Value looks much more reasonable than before. When plotted on the same scale as the ‘grounded’, ‘unterminated’, and ‘+3.3VDC’ conditions, it is clear that the 0.5V p-p case is a real signal.

Then I ran a much longer term (11,820 cycles, or about 22-23 sec) test with 0.5V p-p input, with the following results.

As can be seen from the above plot, the final value is a lot more ‘spiky’ than I expected.  The average value appears to be around 30,000, but the peaks are more like 60,000, an approximately 3:1 ratio.  With this sort of variation, I doubt that a simple thresholding operation for initial IR beam detection would have much chance of success.  Hopefully, these ‘spikes’ are an artifact of one or more remaining bugs in the algorithm, and they will go away once I find & fix them 😉

Update:  Noticed that there was a lot of time jitter on the received IR waveform – wonder if that is the cause of the spikes?

sensor waveform jitter. Note that this display is separately (Vert Mode) triggered.

Following up on this thread, I also looked at the IR LED (transmit) and photodetector (receive) waveforms together, and noted that there is quite a bit of time jitter on the Tx waveform as well, and this is received faithfully by the IR photodetector, as shown in the following short video clip


So, based on the above observations, I decided to replace the Trinket transmit waveform generator with another Teensy 3.5 to see if I could improve the stability of the transmit signal.  Since I never order just one of anything, I happened to have another Teensy 3.5 hanging around, and I soon had it up and running in the setup, as shown below

Replaced Trinket transmitter with Teensy 3.5

Transmit and receive waveforms

As the above short video and photos show, the Teensy implementation of the transmit waveform is much more stable than the Trinket version.  Hopefully this will result in better demodulation performance.

The next step was to acquire some real data using a 0.5V p-p input signal through the IR beam path.  I took this in stages, first verifying that the raw samples were an accurate copy of the input signal, and then proceeding on to the group-sum, cycle-sum, and final value stages of the algorithm.

Sample capture using an input of 0.5V p-p through the IR path

GroupSum I/Q plots using 0.5V p-p Input Signal

I then used Excel to compute the cycle sums associated with each group of 4 group sums

Calculated Cycle Sums for a 0.5V p-p Input Signal

And then I used Excel again to calculate the ‘Final Value’ from the previously calculated cycle sum data

Calculated final value

Keep in mind that all the above plots are generated starting with real IR photodector data, and not that large of an input at that (0.5V p-p out of a possible 3.3V p-p).

The next step was the real ‘proof of the pudding’.  I ran the algorithm again, but this time I simply printed out final values – no intermediate stages, and got the following plots

Final Value vs time, for 0.5V p-p Input Signal

Detail of previous plot

From the above plots, I think it is clear that the algorithm is working fine, and most of the previous crappy results were caused by poor transmit timing stability.  I’m not sure what causes the ripple in the above results, but I have a feeling my friend and mentor John Jenkins is about to tell me! 😉

Sleeeeeep, I need sleeeeeeeeeeep….





IR Modulation Processing Algorithm Development – Part IX

Posted 19 June, 2017

In my last post on this subject, I showed that my 4-sensor band-pass filter (BPF) algorithm was feasible when run on a Teensy 3.5 SBC.  However, what I haven’t done  yet is to verify that the algorithm is indeed producing valid results, when fed with real sensor input.

I should be able to verify proper algorithm operation with my single-sensor test bed (as shown in the following photo) by moving the single sensor input line to each sensor channel (ADC input) in turn, and monitoring the data at different stages in the processing chain.

Teensy 3.5 installed on my algorithm test bed, with the Uno shown for size comparison. The small processor in the foreground is an Adafruit ‘Trinket’

Since I now have plenty of RAM to play with, I should be able to save a representative sample of the input data and intermediate results in suitably sized arrays, run the algorithm long enough to fill those arrays, and then print them all out at the end.

  • I will probably want to run the process long enough to completely fill the 64-element I & Q ‘running sum’ arrays.  These arrays already exist for all 4 sensor channels, so this has no effect on available RAM
  • The next step backward in the chain are the I & Q ‘cycle group sum’ elements (one pair per sensor channel) used to generate one element in the running sum arrays.  To store all these cycle group sum elements will require two 256-element arrays per sensor channel.
  • And the first step in the process is the raw sensor input data.  To store all the data required to generate 64 elements in the running sum arrays will require a single 1280-element array per sensor channel.

In summary, to instrument one sensor channel from start to finish will require

  • 1ea 1280-element array to hold the raw data
  • 2ea 256-element arrays to hold the cycle group sums

for a total of 1280 + 512 = 1796 elements at 2 bytes/element = 3592 bytes.  If I wanted to do this for all 4 sensor channels at once, the total would be 14368 bytes, still well within the 192KB RAM availability on the Teensy – nice!

Results – Capture Stage:

The first step was to capture/display the raw ADC data to make sure that part was operating correctly.  The plots below show all 4 sensor channels.

Raw ADC data for all 4 sensor channels, 1280 elements (enough to fill the entire 64-element running sum array)

First 40 elements of the raw ADC capture

As can be seen in the above plots, channel 1 shows the 520Hz detected IR waveform, and the other three channels show just noise.

Results – Intermediate Stages:

The next step was to verify proper operation of the step that accumulates a 1/4 cycle group of samples and generates the I & Q ‘sample group sum’ components.  To verify this stage of the algorithm, I captured 5 cycles of data, as shown below:

Sensor channel 1 raw data and I/Q sample group sums

In the above plot, the dark blue line is the raw ADC data input, which varies from about the ADC maximum of 4096 to about 3890,  or about 161mV (3.3V ADC reference and IR detector supply).  The resulting ‘sample group sums’ are shown in orange (for the I component) and gray (for the Q component).  The significance of the plot is that the sample group sums and the I/Q component generation appears to be happening correctly.  The orange points follow a {+1, +1, -1, -1} sequence, while the gray ones follow a {+1, -1, -1, +1} sequence, as expected.

Next, I printed out this same 5-cycle segment in text form, as shown below (double-click in code window to enable scrollbar)

The above table shows the raw data, the sample-group sums, and the corresponding cycle-group sums. For example, the first set of 5 data samples adds to 19673.  Since this is the first sample-group sum, it is multiplied by “+1” to form the I component, and “-1” to form the Q component, and these are shown adjacent to the last raw data in that sample group.  After 4 such sample-group sums, the cycle-group sum I/Q components are generated by adding the 4 sample-group I/Q components respectively; for the first cycle these are -1736 & -246 as shown adjacent to the 20th sample (sample #19).

Results – Final Stages:

The cycle-sum I & Q components generated above are saved in separate 64-element circular buffers, and the running sum of these buffers are then used to form the final demodulated value for the channel of interest.  The final value is computed as the sum of the absolute values of the I & Q component running sums, i.e. FV = abs(RunningSumI) + abs(RunningSumQ).  To demonstrate proper algorithm functioning, I printed out the computed final values for well over 1000 cycles of raw data, as shown in the Excel plot below

Computed final values vs complete input data cycles for sensor channel 1

As shown in the plot above, the final value rapidly rises from zero to around 2×106 in the first 64 cycles of the run, after which it generally levels off for the rest of the run.  There is quite a bit of ripple on the signal, which my friend and mentor John Jenkins mentioned might happen as the non phase-locked input and sampling frequencies slowly slid by each other (at least I hope that is what is happening!).

So, it looks like the algorithm is doing what it should, and my ‘scope measurements to date indicate that the Teensy is doing it all without breaking a sweat, even with print statements thrown in.  It appears that I could probably double the number of samples/cycle and still have plenty of time to finish all the computations.

However, there are still a number of things to be accomplished before this new feature makes it into the field.

For starters, I’m not sure how to normalize the final value.  For a fairly weak (~160mv out of 3V) signal the final value is north of 2 million – what happens for stronger signals, and how to I normalize this down to a range that I can use to drive an analog output?  I suppose I could simply apply the IR modulation signal directly to the analog input (bypassing the IR path entirely) and see what happens, but I’d also like to understand the math.  Maybe John Jenkins can help with this (hint, hint, wink, wink!).

Also, I’d like to validate the idea that this algorithm will selectively reject other signals that aren’t close to the desired 520Hz modulation frequency.  I plan to test this by modifying the Trinket algorithm to make it a swept frequency generator (say from 470 – 570 Hz) and see how the output changes.

Stay tuned!







IR Modulation Processing Algorithm Development – Part VIII

Posted 18 June 2017

In my last post on this subject, I showed how I could speed up ADC cycles for the Teensy 3.5 SBC, ending up with a configuration that took only about 5μSec/analog read.  This in turn gave me some confidence that I could implement a full four-sensor digital BPF running at 20 samples/cycle at 520Hz without running out of time.

So, I decided to code this up in an Arduino sketch and see if my confidence was warranted.  The general algorithm for one sensor channel is as follows:

  1. Collect a 1/4 cycle group of samples, and add them all to form a ‘sample_group’
  2. For each sample_group, form I & Q components by multiplying the single sample_group by the appropriate sign for that position in the cycle.  The sign sequence for I is (+,+,-,-), and for Q it is (-,+,+,-) .
  3. Perform steps 1 & 2 above 4 times to collect an entire cycle’s worth of samples.  As each I/Q sample_group component is generated, add it to a ‘cycle_group_sum’ – one for the I and one for the Q component.
  4. When a new set of cycle_group_sums (one for I, one for Q) is completed, use it to update a set of two N-element running sums (one for I, one for Q).
  5. Add the absolute values of the I & Q running sums to form the final demodulated signal value for the sensor channel.

To generalize the above algorithm for K sensor channels, the ‘sample_group’ and ‘cycle_group_sum’ variables become K-element arrays, and each step becomes a K-step loop. The N-element running sum arrays (circular buffers) become [K][M] arrays, i.e. two M-element array for each sensor (one for I, one for Q).

All of the above sampling, summing, and circular buffer management must take place within the ~96μSec ‘window’ between samples, but not all steps have to be performed each time.  A new sample for each sensor channel is acquired at each point, but sample groups are converted to cycle group sums only once every 5 passes, and  the running sum and final values are only updated every 20 passes.

I built up the algorithm in VS2017 and put in some print statements to show how the gears are turning.  In addition, I added code to set a digital output HIGH at the start of each sample window, and LOW when all processing for that pass was finished.  The idea is that if the HIGH portion of the pulse is less than the available window time, all is well. When I ran this code on my Teensy 3.5, I got the following print output (truncated for brevity)

And the digital output pulse on the scope is shown in the following photo

Timing pulse for BPF algorithm run, shown at 10uS/cm. Note the time between rising edges is almost exactly 96uSec, and there is well over 60uSec ‘free time’ between the end of processing and the start of the next acquisition window.

As can be seen in the above photo, there appears to be plenty of time (over 60μSec) remaining between the end of processing for one acquisition cycle, and the start of the next acquisition window.  Also, note the fainter ‘fill-in’ section over the LOW part of the digital output.  I believe this shows that not all acquisition cycles take the same amount of processing time.  Four acquisition cycles out of every 5 require much less processing, as all that happens is the individual samples are grouped into a ‘sample_group’.  So the faint ‘fill-in’ section probably shows the additional time required for the processing that occurs after collection/summation of each ‘sample_group’.

The code for these measurements is included below:

More to come,



IR Modulation Processing Algorithm Development – Part VII

Posted 17 June 2017

In my previous post on this subject, I discussed my decision to change from an Arduino Uno SBC to a Teensy 3.5 for implementing the  ‘degenerate N-path’ digital band-pass filter (BPF) originally introduced to me by my old friend and mentor John Jenkins.  After replacing the Uno with the Teensy and getting everything running  (which took some doing, mostly due to my own ignorance/inability), it was time to see if the change would pay off in actual operation.

In my initial perusal of the available documentation for the Teensy 3.x SBC (have I told you lately how much I love the widespread availability of information on the  inet?), I ran across some new programming features that aren’t available in the rest of the Arduino world.  The Teensy 3.x supports two independent 32-bit timers, supported by two new libraries (TimerOne and TimerThree).  When I first looked at this new functionality, I thought – “wow – this is just what I need to implement the sampling front-end portion of the digital BPF – I can use it with an appropriate ISR to get accurate sample timing!”.   And then I ran across Paul’s ‘Delay and Timing‘ page with it’s description of the new ‘elapsedMillis’ and ‘elapsedMicros’ functions; These functions allow for accurate periodic execution of code blocks inside the normal ‘loop()’ function, without having to deal with interrupts and ISRs – cool!  And then I ran across the ‘FrequencyTimer2’ library written by Jim Studt….

So now I found myself going from no real good options for accurate sample timing to a ‘veritable plethora’ of options, all of which looked pretty awesome – what’s a guy to do?  Since the ‘elapsedMicros’ option looked like the simplest one to implement, I decided to try it first.


From previous work I have a Trinket SBC transmitting an IR beam modulated by a square-wave at approximately 520Hz.  The plan is to sample this waveform 20 times per cycle, and to have the sampling frequency as close as possible to 20×520 = 10.4Ksamples/sec, or approximately 96μS/sample.

I created a small test program to explore the feasibility of using the ‘elapsedMicros()’ function for IR detector sensor sampling.


In the above program, I simply generate a 10μS pulse every 95.7μS.  The ‘95.7’ value was empirically determined by watching the transmitted  IR waveform and the 10μS pulses together on a scope, and adjusting the value until the difference between the two frequencies was as small as possible (i.e. when the movement of the transmit waveform compared to the pulse train was as slow as possible), as shown in the short video below:


In the above video, the lower trace is the generated pulse train, and the upper trace is the transmitted IR modulation waveform.  The scope trigger was set to the pulse train, with the modulation waveform free to slide left or right based on the ‘beat frequency’ between the two waveforms.

Next, I added code to save ADC samples to an array for later printout.  Now that I am no longer constrained by the minuscule amount of RAM available on the Uno, I opened up the array size to 2000 elements to allow more viewing time before the program was interrupted by the serial output delays.  The code for this and the resulting Excel plot are shown below:

The resulting 2000 element array was dropped into Excel and plotted, as shown below:

All 2000 samples from the test program

First 40 samples. Note that 40 samples covers exactly two cycles of the modulation waveform

So, it looks like the ‘elapsedMicros()’ function is doing exactly what I want it to do – sampling the input waveform at almost exactly 20 samp/sec without me having to figure out the exact delay time needed.

The next step was to determine how much ‘free time’ is left over for other processing steps like sampling multiple sensor channels, doing the ‘sample’ and ‘cycle’ sums, etc.  For this step, I removed the array loading section and replaced it with a call to ‘delayMicros()’.  Then I manually adjusted the delay value until the period of pulse train started expanding away  from the desired 95.7μS value.  The result was that a delay value of 85μS did not change the pulse period, but a value of 90μS did (slightly).  So, I have between 85 and 90μS of ‘free time’ available (out of a total of 96!!!)  for other processing chores.  Adding a single call to ‘analogRead(IRDET_PIN)’ reduced the available ‘free time’ by about 15μS, from between 85 & 90 to between 70 & 75μS.  This shows that the time for a single analog read is about 15μS, which may be due to the same pre-scaling issue as I saw on the Uno (to be determined).  In any case, even if I utilize 4 sensor channels, I should be have about 25μS left over for the summation and array load operations.

To investigate the analogRead() timing issues, I set up a small program to measure the time required to read a pin 1000 times.  Here’s the code:

With the above code, and with all default settings, the time required for 1000 reads was 17mSec, so about 17μS, which tracks well with  the above measurements.

After changing the conversion speed to ADC_CONVERSION_SPEED::HIGH_SPEED, the time required for 1000 measurements was reduced to 11mS, so about 11μS per read.

I ran a whole series of test with the different Teensy ADC library settings, with the following results.  All times are in microseconds, and are the average of 1000 iterations

  • conversion and sampling speed set to “HIGH”: 10.997
  • all adjustments commented out: 17.281
  • just conversion speed set to “HIGH”: 11.014
  • just sampling speed set to “HIGH”: 15.190
  • just resolution changed to 12 bits: 17.276
  • just resolution changed to 8 bits: 17.242
  • HIGH conversion and sampling speeds, and with 8-bit res: 8.931
  • HIGH conversion and sampling speeds, and with 12-bit res: 10.998
  • All of the above, plus averaging set to 1: 4.758

So, I can get the ADC time down to about 5uS/sensor, which means that even with four sensor channels being monitored, I will have over 70uSec for ‘other stuff’, which should be more than enough to get everything done.



IR Modulation Processing Algorithm Development – Part VI

Posted 14 June 2017

In my previous posts on this subject, I have been working with an Arduino Uno as the demodulator processor, but I have been plagued by its limitation of 2KB for program memory. This has caused severe limitations with timing debug, as I can’t make debug arrays long enough for decent time averaging, and I can’t do more than one sensor channel at a time.

So, I finally took the plunge and acquired some of Paul J Stoffregen’s Teensy 3.5 processors from their store.  From their site: “Version 3.5 features a 32 bit 120 MHz ARM Cortex-M4 processor with floating point unit. All digital pins are 5 volt tolerant.” The tech specs are shown on this page, but the main features I was interested in are:

  • 120MHz processor speed vs 16MHz for the Uno
  • 192KB RAM vs 2KB for the Uno
  • Analog input has 13 bit resolution vs 12 for the Uno
  • As an added bonus, the Cortex-M4 has an FPU, so integer-only math may be unnecessary.
  • Much smaller physical footprint – the Teensy 3.5 is about 1/4 the area of the Uno
  • Lower power consumption – The Teensy 3.5 at 120MHz consumes about 30mA at 5V vs about 45mA at 5V for the Uno.

Here are some photos of the Teensy 3.5 as installed on my algorithm test bed, and also on my Wall-E2 robot where it might be installed:

Teensy 3.5 installed on my algorithm test bed, with the Uno shown for size comparison. The small processor in the foreground is an Adafruit ‘Trinket’

Side-by-side comparison of the Uno and Teensy 3.5 SBC’s

Closeup of the Teensy 3.5 shown atop the ‘sunshade’ surrounding the IR sensors.  this is a possible installed location

Wider view of a Teensy 3.5 placed atop the ‘sunshade’ surrounding the IR sensors

In addition to all these goodies, the folks at Visual Micro added the Teensy line to their Microsoft Visual Studio add-on, so programming a Teensy 3.5 is just as easy as programming a Uno – YAY!

Of course, I’ll need to re-run all the timing tests I did before, but being able to create and load (almost) arbitrary-length sample capture arrays for debugging purposes will be a great help, not to mention the ability to use floating-point calculations for better accuracy.

Stay tuned,




IR Modulation Processing Algorithm Development – Part V

Posted  09 June, 2017

In getting the Arduino code working on my Uno/Trinket test setup (shown below), I have been having some trouble getting the delays right.  It finally occurred to me that I should run some basic timing experiments, so here goes:

Sample Group Acquisition Loop:

this is the loop that acquires analog samples from the IR detector, and sums 1/4 cycle’s worth into a single ‘sample group’.  To measure this time, I ran the following code:
int startusec = micros();
int sum = 0;
for (int i = 0; i < 1000; i++)
int samp = analogRead(SQWAVE_INPUT_PIN1);
sum += samp;
int endusec = micros();
Serial.print("time required for 1000 analog read/sum cycles = "); Serial.println(endusec - startusec);

The time required for 1000 cycles was 15064 uSec, meaning that one pass through the loop takes an average of just over 15 uSec. Adding a 85 uSec delay to the loop should result in a loop time of exactly 100 uSec, and a 1000 pass loop time of 100,000 uSec or 0.1sec.  The actual result was 99504, or about 99.5 uSec/cycle – pretty close!

Next, I replaced the summation with a write to a 500-element array (couldn’t do 1000 and still fit within the Uno’s 2K memory limit), and verified that this did not materially change the loop timing.  The time required for 500 loops was 49788; twice that time would be 99576, or almost exactly the same as the 99504 time for the summation version.

Then I tweaked the delay to achieve as close to 25 complete cycles as possible, as shown in the Excel plot below.  With an 82uSec loop delay, the total time for 500 loop iterations was 48272, or about 96.544 uSec per loop iteration.

96.544 uSec per loop iteration, and 20 loop iterations per cycle gives 20*96.544 = 1930.88 uSec per cycle or 518 Hz.  This is very close to the 525Hz value I got from my O’scope frequency readout when I first fabricated my little test setup.

Next, I coded 500 iterations of a two-detector capture/sum operation, and got: “time required for 2-detector 500 analog read/store cycles = 15520”.  So,  about 31 uSec/iteration, or almost exactly twice the one-detector setup.  A four-detector setup yielded a time of 30352 uSec for 500 iterations, or about 60.15 uSec/iteration.  So, a 4-detector setup is possible, assuming the Uno 2KB memory constraint issue can be addressed successfully.

In summary:

  • It takes about 15 uSec to read each sensor’s A/D value and either sum it or store it in an array
  • A four-sensor setup can probably be accommodated, but only if the required summing arrays fit into available memory (not possible for Uno, but maybe for others.
  • A loop delay value of 82 uSec results in almost exactly 20 samples/cycle.

Stay tuned





IR Modulation Processing Algorithm Development – Part IV

Posted 07 June 2017

I seem to have grabbed a tiger by the tail in my continued collaboration with my old friend and mentor John Jenkins on this project to extract the estimated magnitude of a square-wave modulated IR signal in the presence of ‘flooding’ from ambient light sources.  The whole thing started out innocently enough when John was at our house a few weeks ago and I showed him my spiffy wall-following autonomous robot Wall-E2.  I mentioned at the time that I was having some trouble getting Wall-E2 to successfully home in on an IR beam to mate with a charging station, and he suggested that a square-wave modulated signal might do the trick, as it would allow me (and Wall-E2) to discriminate between the IR beam and the other interfering signals.

I should have known right then that I was in trouble, as John had that look in his eyes – the one that says “Hmm, that’s an interesting problem…..”.  I have seen that look any number of times over the 40 years or so that I have known him, and it always results in me tearing up my previous work (and my previous assumptions) and starting over again.  The only saving graces in all this are a) It’s a lot of fun when it happens, b) I’m retired now so I don’t care how long it takes or how much work is involved, and c) I’m a masochist at heart! ;-).

So, here we are.  John and I have been exchanging emails over the last week or so, discussing the ‘best’ way to solve this problem.  One of the first things that happened was John started blabbering about ‘Degenerate N-path Bandpass Filters’, and I had no idea what he was talking about (I hate it when that happens!).  Of course I couldn’t tell John that I was completely ignorant, so I made the appropriate noises and raced to educate myself before he discovered my ignorance.  I found a neat video that explained the technique in a way that even I could understand. The video focused on implementing the filter technique in CMOS hardware, but the general technique is applicable to the Arduino world as well, as long as the modulation frequency is low enough to accommodate the lower clock speeds.

John came up with a brilliant graphical illustration of the algorithm used for implementing a N-path band-pass filter.  Even more amazing, he did it in Excel, so the whole damned thing is live – wow!   As shown in the ‘dead’ version below, there are two ‘channels’ – an in-phase (I) and quadrature (Q) ‘channel’.  Both channels start with a group of samples spanning exactly 1/4 cycle that are summed together to form a ‘sample group’.  In the I channel, each group is given a sign in the sequence ‘+’, ‘+’, ‘-‘, ‘-‘, and in the Q channel this same group is given a sign in the sequence ‘-‘, ‘+’, ‘+’, ‘-‘.  The four groups in each channel are summed to form the I & Q ‘cycle sums’, and each such sum is added to a N-element circular buffer (one each for the I & Q channels).  The running sum of all elements in each circular buffer are the band-pass filtered I & Q components of the input signal.  The final result is formed by adding the absolute values of the I & Q running sums.

Page 1 of the above document shows the sign sequence for the in-phase and quadrature ‘channels’.  Note that the input to both channels is the same ‘sum-of-5-samples’ group, but the sign changes in a different sequence for the I & Q ‘channels’.  Each 1/4 cycle of the input signal is treated in the same fashion.  The horizontal time scale is specific for the planned 500Hz modulation signal.

Page 2 depicts the real heart of the algorithm, as it shows how each ‘sample sum’ (1/4-cycle sum-of-samples) feeds into the final circular summing buffer.  Four ‘sample sum’ groups (comprising one signal cycle) are summed into a ‘cycle sum’ for both the I & Q channels, and each such ‘cycle sum’ is loaded into the corresponding I or Q circular summing buffer.  The latest ‘cycle sum’ element replaces the oldest element, and therefore the  circular summing buffer for each channel represents a N-element  band-pass filter, where N is the length of the circular summing buffer.  This diagram has a lot of information in it, so it can take some time to get comfortable with it (it did for me, anyway).

Some other random details:

  • This diagram is set up for a 64-element circular summing buffer, but shorter or longer is OK too.  The band-pass filter bandwidth is inversely proportional to the buffer length.
  • The times noted in the labels at the top are for a presumed 500Hz modulation, with a period of 2000uSec.
  • The notation m = n/5 comes from the fact that (in this particular implementation) there are 20 samples/cycle, which means that each 1/4 cycle group of contains 5 samples.  For 64 elements, each comprising 1 entire cycle of samples, there are 64X20 = 1280 samples. So in this implementation, m/4 = 64 ==> m = 256 = n/5 ==> n = 1280 total samples represented in the circular buffer at any one time.

Page 3 shows the contents of one of the two circular buffers, after each complete ‘rotation’ of the buffer.  After 64 complete cycles the buffer is full, as shown in the ’00’ column.  64 cycles later, the buffer contents are as shown in the ’01’ column, and so on.  The text below shows the procedure for start and running the buffer.  Note in this text that “next cycle value” and “current cycle value” are the same thing, and the “input pointer” and “output pointer” variables are incremented MOD N, (N = 64 here).

Pages 4-12 show the input signal, the I/Q channel values, and the I & Q circular buffer running sums for different phase offsets between the transmitted and received signals (transmit & receive frequencies are the same in all cases).  Page 4, for instance, shows the situation for the receiver perfectly in phase with the transmitted signal.  If we look at the I & Q summed values at integral cycle boundaries (-1, 0, +1, etc) we see that the I signal is at 128, and the Q signal is at 0, giving abs(I) + abs(Q) = 128 + 0 = 128.  If the same calculation is performed for all the other phase relationships (i.e. pages 5-12) at the same points, the answer will always be the same, i.e. 128.  This shows that the band-pass filter implementation works as intended, even without any phase-locking requirement.  This treatment assumes that the Tx & Rx clocks are identical, so that the 1/4-cycle sample groups span exactly 1/4 cycle.  Any difference between the two clocks will show up as ripple on the results, proportional to the difference between the two frequencies.  This error term should not be significant for the typical single-board-computer crystal-controlled clocks.

I sent this post off to John for approval, and got the following email back, with some additional clarifying comments:

  • n-path filter is degenerate (my term) because it only uses two paths — I and Q — vice many as shown in video (very good video btw,learn a lot from it too)
  • possible topics for more detail related to last paragraph (but beware that perfect is enemy of good enough or something like that):
    • output ripple
      • frequency ==> difference between tx and rx freqs should be very small
        • only spec found was +/-50ppm, so 100ppm delta worst-case w/o aging, etc
        • 100ppm at 500Hz ==> 0.05Hz
        • believe ripple will be twice difference in freq because of this being a fullwave synchronous rectifier (not verified), so 0.1Hz
      • magnitude ==> variations due to sample(s) from one 1/4-cycle group getting into an adjacent 1/4-cycle group as tx and rx phases slide past each other at <<0.1cycle/sec
        • non-50/50 duty cycle is most likely cause
        • with 5-samples per 1/4-cycle group normalized ripple could vary from 1.0 to 0.8;
          • not a problem for the relative outputs of two sensors for steering
          • could be important in cases where absolute magnitude is needed because bpf (eg, 10Hz) would not average signal for long enough to average out ripple this slow ((eg, 1 cycle every 10sec)
          • increasing # of samples per 1/4-cycle group will reduce this effect
    • no antialias filter is used so # of samples per 1/4-cycle group needs to be significantly higher than nyquist requirement for 2/bw to avoid issues (unless clock rate is servo’d to correct freq by monitoring and setting Q value to zero)

More to come – stay tuned!